<html><head><meta name="color-scheme" content="light dark"></head><body><pre style="word-wrap: break-word; white-space: pre-wrap;">From 28aa7c7f0da70b7410926ec5f5737e2b78e0cdfa Mon Sep 17 00:00:00 2001
From: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Date: Thu, 18 Jul 2019 15:26:03 +0800
Subject: [PATCH] arm64: dts: ls1028a: support Felix/PF5 INTB interrupt

The INTB interrupt includes,
- PTP timestamp ready in timestamp FIFO
- TSN Preemption

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
---
 arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -730,7 +730,6 @@
 			reg = &lt;0x01 0xf0000000 0x0 0x100000&gt;;
 			#address-cells = &lt;3&gt;;
 			#size-cells = &lt;2&gt;;
-			#interrupt-cells = &lt;1&gt;;
 			msi-parent = &lt;&amp;its&gt;;
 			device_type = "pci";
 			bus-range = &lt;0x0 0x0&gt;;
@@ -783,6 +782,8 @@
 			switch@0,5 {
 				compatible = "mscc,felix-switch";
 				reg = &lt;0x000500 0 0 0 0&gt;;
+				/* IEP INT_B */
+				interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;
 
 				ports {
 					#address-cells = &lt;1&gt;;
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